Anti-Glare Coatings Based on Porous Silicon Structures

Modern photovoltaic cells use conductive oxides or dielectric materials as antireflective coatings. Today, solar systems are the fastest growing energy generation systems due to the environmental concerns and increasing demand for a clean and renewable energy source. Silicon solar cells have dominated the current market of photovoltaic solar cells, accounting for over 95 % in the market. This due to the abundance of raw materials (silicon), low cost, simple and cheap manufacturing technology. Despite its dominance, fabrication of silicon solar cells with a high conversion efficiency has been challenging due to high sunlight reflectance (over 35 %). Traditional techniques such as antireflection coating (ARC) and texturing have failed to provide a solution as they leave a large potential energy unused due to inefficient light harvesting in the near infrared spectrum. In this work, we Varied the shape, height and width of the silicon surface structure to control the optical resonance and guide more light to the PV surface by bouncing the light around inside the PV cell, keeping the light in the cell longer and consequently increasing the chances of colliding with electrons. The surface reflection has been drastically reduced to almost zero using gradient porous silicon technique.

Table of Content

Porous silicon technology with different pore morphologies, from macro porous down to gradient porous structures with good photo-absorption capability.

Keywords: Porous silicon; Photovoltaics; Antireflection coating; Silicon; Etching; Optical resonance.

1.Introduction

Porous silicon is a high-tech material with exclusive physical and chemical properties. This material can be used to produce light-emitting diodes, photodetectors and optical fibers, which can be combined into a single unit as a transmitter, optical information transmission medium and receiver. The relative simplicity of formation of structures with controlled morphology of the porous material, compatibility with silicon-based microelectronics technological operations serves as a ground to expect the development of other electronic and optical devices on the basis of layers with low, medium, high porosity and macroporous regular structures.^1,2 Maruska et al first developed an electrochemical processing technique for preparing silicon samples with nanostructural carrier confinement properties.^3,4 Quantum size effects in the material apparently lead to an increase in the optical gap energy, corresponding to the energy of carrier confinement. cell⁵ The acidic etching of the surface of silicon wafer usually results in a homogeneous porous silicon (PS) surface layer having a reflectance as low as 9 % or less.⁶ Therefore, surface texturing is a vital tool incorporated to improve the conversion efficiency of silicon solar cells by varying the bandgap and absorption properties of the silicon materials. In addition to reducing reflection of the incoming light, light-trapping of long wavelength is also desirable, which becomes even more important for thinner wafers or ribbon materials.⁷ Etching of silicon wafers in a diluted nitric and hydrofluoric acid (NHO₃/HF) at room temperature leads to an appropriate porous surface layer, which gives the wafer a blue-to-purple look in order to minimize reflectance effect. The common objective is to form an antireflection (AR) "coating" and simultaneously etch back the emitter by forming Porous Silicon on finished cells.⁶ At present, the main approaches to producing highly efficient solar cells rely solely on silicon, which is the workhorse of the photovoltaics industry, although GaAs is also given much consideration. Efficiencies exceeding 20 % have been achieved with the two materials, but costs still remain above competitive levels. GaAs has a direct bandgap that gives strong optical absorption⁸ and hence a short absorption length requirement of only a few microns; however, GaAs is a very costly material,⁹ and a non-absorbing GaAs substrate must be provided for mechanical support. In other words, Silicon is abundant in the earth's crust and therefore less expensive than GaAs, but its poor optical absorption properties (basically an indirect bandgap) lead to the requirement of very thick solar cells. Consequently, high efficiency silicon solar cells require complicated and costly processing procedures. However, since porous silicon material exhibits such intense photoluminescence, it appears as if this form of silicon has acquired a direct bandgap.⁵ The possibility, therefore, exists that by a relatively simple, quick, low-cost etching process, a thin film of highly absorbing silicon can be formed, with a band edge and absorption length comparable to that of expensive GaAs. Development of solar cell structures in this new form of silicon could lead to enhanced single junction cells, which is why porous silicon solar cells are seen to be more efficient than the normal conventional silicon solar cells.⁷

In this work, we demonstrate how porous structures of silicon can be tuned down from macro- to nano-scale and gradient structure (combined). This technique is based on the re-engineering of the surface of the silicon wafer, which does not only increase the solar cell efficiency but also shows a drastic cost reduction. The objective of this paper is to demonstrate the tenability of pore sizes of porous silicon structures to control the optical resonance that translates into a strong light absorption.

2. EXPERIMENTAL SECTION

General system descriptions: The various structures were prepared using electrochemical etching method. However, nanostructures can also be achieved with only chemical etching, but with longer time,^10,11 whereas electrochemical etching method requires less etching time. From our experiment, it is deduced that bigger pores could also be achieved with ordinary chemical etching, but chemical additives such as platinum are necessary to be added to the HF solution in order to enhance the etching potential. The etching time is another important factor in our experiment as it is used to determine the layer thickness and pore sizes during the process, and the resulting film is in turn determined by the value of the resistivity of the selected sample (silicon), as well as the density of the anodic etching current. P-type silicon wafers with the resistivity of 1 Ωcm, orientation of [111]; and p-Si wafer [100] with a specific resistance of 36 Ωcm were selected for the experiments. For the gradient structure, etching was carried out at a constant current density of 2.5 mA/cm² in a solution of hydrofluoric acid in alcohol with the solution ratio HF:C₂H₅:XCMA = 200:50:1 (CTCA-cetyltrimethylammonium chloride). The etching time was 480 minutes. The mode of manufacturing the gradient structures does not provide a change in the electrolyte during the etching process. Spontaneous formation of the morphology of the porous structure occurs at a constant density of the anodic etching current. The porous surface, in comparison with the surface of the original silicon wafer, acquires a black color (Fig. 1c). However, when viewed with the bare eyes, there is no noticeable increase in the roughness of the porous surface, which was the characteristic of the porous surface of single-layer Porous Silicon films. The experimented thickness of the outer nanoporous layer in the gradient structures is 0.2 to 1.3 μm regardless of the orientation of the initial surface of the silicon wafers.

Etching Technique: In the etching system, the sample is located on a metal plate (Fig. 1b). The semiconductor-metal contact is realized by treating the plate with a liquid-metal solution of In-Ga eutectic (24 % In, 76 % Ga). The metal plate is pressed against the fluoroplastic form by a threaded joint. To prevent the electrolyte from flowing during the electrochemical etching, the structure was made of a durite gasket, which ensured the integrity of the structure. Thanks to the dense fixing of the sample, it is possible to create a uniform distribution of the electric current across the entire plate, so that during the etching there is no voltage drop and the etching passes uniformly. The metal is supplied with a positive potential from a DC source voltage. A negative electrode used was a platinum and nickel mesh which ensures uniformity of the electric field. It is located by immersing it in an electrolyte. For better mixing of the electrolyte, the electrode is rotated, or a mechanical agitator is additionally used. The features noted make it possible to form homogeneous layers over the entire surface of the sample with the possibility of great depth. The design of the cassette does not provide for the use of illumination from the back of the plates. Since only p-type conductivity plates are used in the work, the experiments have revealed that it does not have a significant effect on the results. Due to this, we conducted anode etching of monocrystalline silicon wafers with resistance from 0.01 Ω cm to 1 k Ω cm since there is no backlighting, preventing the overheating of the samples and etching is carried out at normal temperature. The strength of the anodic etching current was monitored by a current meter connected in series to the power circuit and kept constant during the etching by means of a direct current generator. The current density of the sample was varied from 0.1 to 55 mA/cm².

Synthesis of graphene-like films was carried out according to a previously designed technique of non-catalytic deposition of graphene films by the method of chemical vapor deposition (CVD) in sharp pressure changes (SPC) mode into pore walls ^[12]. The process was carried out at reduced pressure (10 mmHg). At the beginning of the process, the reactor was evacuated with a fore-vacuum pump and purged with high-purity Argon, while ethyl alcohol was injected controllably with a peristaltic pump immediately into the evaporation zone. Next, the temperature was raised to the specified value and kept for a certain time (from 1 to 3 h). After the end of the process, the reactor was cooled in an Argon flow. The deposition temperature was varied within 850 and 1050°C. In the experiment, it was established that, with increasing synthesis duration up to 3 h, the depth of carbon penetration into the pores does not change in the whole temperature range. Carbon deposits chiefly in the near-surface layer and do not diffuse deep into pores. Therefore, it was proposed to cut off the pump periodically during the synthesis in order to raise the vapor pressure in the reactor up to the level of 500 mmHg. The reactor was then evacuated quickly. Sharp pressure changes were thus, created in the reaction zone. The experiments revealed that synthesis in the SPC mode, firstly, facilitates deeper alcohol vapor penetration into the pores and secondly, provides removal of by-products of ethanol pyrolysis from porous membrane nanostructures.

Fig. 1 Electrochemical etching system. (a) Cross-sectional view of lateral anodization cell. (b) Electrochemical cell for deep anodic etching of silicon

3.RESULTS AND DISCUSSION

Reflectance Measurement: The experiment was performed in the Single Crystals Based Laboratory of NUST, MISIS, Russia using the UV-Vis-NIR Spectrophotometer to investigate the reflectance spectra of various structures of silicon wafers for [100] and [111] orientations, respectively, extending from macro- to nanostructures, and then to gradient structures.

Fig. 2 Reflectance of different engineered surface morphologies. (a) Comparison of surface reflection between polished and etched surfaces, respectively. (b) Effect of graphene deposition on porous silicon. (c) Reflection from Nanoporous morphology. (d) Ultra-low reflection from gradient porous structure.

Fig. 2 displays the responses of porous silicon structure to photons under varying wavelength conditions. The results show a great deal of improvement in porous silicon technology seeing the enormous reduction of reflectance below 0.01 % compared to most antireflection coated structures with extremely high reflectance up to 12.6 % at about 650 nm.¹³ Strehlke et al⁵ detailed the performance evaluation of silicon wafers with/without porous silicon, showing over 9 % reflection of the incoming radiation with ordinary wafers, while their porous counterparts exhibit a lower reflection. A comparative analysis of previous studies based on porous silicon for antireflection coatings is presented in Table 1.

Table 1 Effective reflectance from different silicon surfaces.

Silicon Surface Treatment	Reflectance (%)	Reference	Silicon Surface Treatment	Reflectance (%)	Reference
PS (60 %), 105 nm, (n⁺ - p), Si (100)	7.3	^[15]	PS (78 %)/PS (38 %)/(n⁺ - p) Si	2.4	^[16]
Mc – Si (acid textured)	11.4	^[17]	SiN_x/mc-Si	5.3	^[17]
CZ – Si (alkaline textured)	12.6	^[13]	PS (strain etching)/CZ-Si (alkaline textured)	3.4	^[13]
PS (stain etching)/CZ-Si (alkaline textured)	3.1	^[13]	PS/Si (100)	9.0	^[18]
PS/(n⁺ - p) Si	4.0	^[19]	PS NW/Si	0.1	^[20]

Table 2 Reflectance of various silicon structural surfaces at 650 nm (this work).

Sample	Description	% Reflectance	Figure Ref
Polished Silicon	[100] substrate	33.2300	2a
Polished Silicon	[111] substrate	33.2000	2a
Mesoporous Silicon	[100] substrate	1.6130	2a
Mesoporous Silicon	[111] substrate	1.6143	2a
Nanoporous Si (100)	With graphene	0.1463	2b
Nanoporous Si (100)	Without graphene	0.1561	2b
Nanoporous Structure	[111] orientation	0.0437	2c
Nanoporous Structure			2c
Gradient Structure	[100] orientation	0.0043	2d
Gradient Structure	[111] orientation	0.0010	2d

As illustrated in Fig. 2, it is noticeable that the porous silicon solar cells have better photo absorption potential compared to the technologies with antireflection coatings. Our work (Fig. 2, Table 2) illustrates the performance and solar reflection of the various structures at 650 nm. By default, the polished structure reflects more than 30 % of the incident radiation.¹⁴ Therefore, porosifying the structural surface enhances photo-absorption and consequently improves the overall performance. Altogether, the gradient porous silicon (Fig. 2d) performs better than all other structures because it has the tendency of absorbing a wider spectrum of light and generate a corresponding photo-current in photovoltaic applications. Other structures also demonstrate good performance as well.

Material Characterization: The microscopic images illustrate the surface makeups and structures of different silicon surface morphologies considering the different porous layout. Fig. 3 demonstrates the SEM and optical images of gradient-porous GPSi–var structure [100] and [111], indicating from the bottom to the top the macro-, meso-, to nano- layers respectively. The macro layer is about 122 μm, meso 200 μm and nano ~2 μm, giving a total of 324 μm (Fig. 3a). The topmost thinnest (distal) layer in Fig. 3a B&C represent a nanoporous film. The presence of this nanoporous layer practically doubles the reflection coefficient in comparison with the lower-lying macroporous layer.

Fig. 3 (a) SEM image of the gradient-porous GPSi-var structure, Si wafer surface [100], resistivity = 36 Ω cm at etching time of 480 min and current density of 2.5 mA/cm². (b) Optical image of an arbitrary cleave of c-Si wafer, resistivity = 36 Ω cm with GPSi-var layers. Orientation of the Si wafer surface: 1&2 are [100] and [111] respectively, at etching time of 480 min and current density of 2.5 mA/cm²

In conclusion, the result shows that the porous structures cannot only reach the low value of the reflection in the visible and IR regions of the spectrum but also can expand to the short-wavelength (UV) region of the solar spectrum. Our findings have proven that porous structures can comfortably replace the conventional cells with antireflection coating at extremely low technology cost, which will, in turn, make it affordable to all categories of users as possible. The method does not require any expensive engineering technique to implement as compared to the traditional systems. The technology is not only promising in photovoltaics, but it can also be applied in lithium batteries (to store lithium ions), water splitting (to generate hydrogen/oxygen), LED fabrication, gas sensing, and piezoelectric technology.

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